Reliability Engineering of High Performance Complex Networks

High Performance Computing Systems (HPC)
Supervisor: Dr. Farshad Safaei
Current location: Second floor of the Faculty of Engineering and Computer Science, Room 230
 Collaborators: 7 master students, 4 doctoral students

Main activity:

  • • Interconnection and chip networks
  • • High Performance Systems (HPC) Architecture
  • • Complex and social networks
  • • Advanced storage systems architecture

 Some project titles:

  • • Performance evaluation and analytical modeling of congestion management in chip networks
  • • Fault-tolerant routing algorithms in wireless chip networks
  • • Evaluate and analyze methods and measures of strength and resilience in complex and social networks
  • • Investigate the challenges of flash memory in solid state driver storage systems
  • • Implement page replacement algorithms in cache in heterogeneous environments
  • • Verification of fault tolerant resolution mechanisms in cross-chip networks using formal methods